An ingenious combination of Si-based quantum-dot devices with cryogenic CMOS interface circuitry is shedding light for quantum computing and IoT technology. In this tutorial, we introduce a Cryogenic CMOS Framework for Quantum Computing and Future IoT applications. Three subjects are included:
- Silicon-based Quantum Devices for Quantum Computing We will discuss the first-of-its-kind, CMOS technology for the implementation of quantum devices, including quantum-dot qubits for quantum registers, quantum-dot transistors for charge sensing, and cryogenic CMOSFETs for interface circuitry. The technical challenges for the fabrication and operation of quantum devices will be addressed from engineering perspectives.
- Cryogenic CMOS Interface Circuitry for Quantum Computing The cryogenic interface circuitry has been developed for qubit control and readout. For spin- and superconducting-based qubits, microwave techniques have played an important role in providing periodic pulse control and charge sensing. The qubit state is sensed indirectly by changing the resonance frequency of a microwave resonator or the signal reflection of a microwave reflectometry. The circuit design technique will be reviewed.
- Dose Quantum Computing strengthen or threaten IOT Security? To be or not to be. Rapid evolution of quantum computing threatens many popular encryption systems, such as Rivest-Shamir-Adleman, elliptic curve cryptography, or Diffie-Hellman. These existing cryptography systems as cores for modern Internet security ecosystem and spreads worldwide in any IoT devices, which has provided high security until Quantum computing emerges. Concise information about how quantum computing attacks the IoT crypto-system and how quantum computing resists and prevents the IoT devices from Hackers will be offered.
Dr. Pei-Wen Li, National Chiao Tung University, Hsinchu NYCU
Pei-Wen Li received her Ph.D. degree from Columbia University in New York City, in Electrical Engineering in 1994. She is a Professor in the Institute of Electronics and has served as the Director of Nano Facility Center at National Chiao Tung University (NCTU) in 2015-2018. Prior to joining NCTU in 2015, she was the Distinguished Professor, Chair of Electrical Engineering Department, and Director of Nano Science and Technology at National Central University. She was a Research Visiting Scholar at Caltech in 2011-2012. She worked with Vanguard International Semiconductor Corporation on DRAM technology integration in 1995-1996. Her research themes focus on experimental germanium nanostructures and devices, encompassing quantum-dot single electron transistors, photodetectors, nonvolatile memory, and thermoelectric devices, making use of self-assembly nanostructures in silicon integration technology. She has published more than 300 technical journal and conference papers and holds 8 patents. She is an IEEE Distinguished Lecturer and serves on the VLSI Technology and Education committees of IEEE EDS. She is an editorial board member of Applied Physics A, Springer and serves on various important conference committees (IEEE SNW, IEEE EDTM, SSDM). She was awarded Distinguished Professor from the Chinese Electrical Engineering Society (2015) and Top 10 Rising Stars in Taiwan (Science and Technology) from Central News Agency in 2008. In 2018-2021, her group has published 5 research papers in the prestigious conferences of IEDM and VLSI Tech., including one invited talk in IEDM 2020.
Dr.Chien-Nan Kuo , National Chiao Tung University, Hsinchu NYCU
Chien-Nan Kuo received the Ph.D. degree in electrical engineering from University of California, Los Angeles in 1997. He is currently a Professor in the Department of Electronics Engineering, National Yang Ming Chiao Tung University (NYCU), Hsinchu, Taiwan. He has five years of experience working in industry in USA on wireless communication product development. His research interests include wireless transceiver front-end and system integration design, low-power design for the application of wireless sensor networks, terahertz imaging circuit and system design. He has published more than 100 journal and conference technical papers and holds 10 patents. Dr. Kuo has been a Technical Program Committee member of the IEEE Asian Solid-State Circuits Conference since 2005 and the IEEE Silicon Monolithic Integrated Circuits in RF Systems Conference (SiRF) since 2007. He serves as the General Chair of SiRF in 2015. He was a co-recipient of the 2006 Best Paper Award presented at the 13th IEEE International Conference on Electronics, Circuits and Systems. He received the 2013 Excellent Young Engineer Award from Chinese Institute of Engineers. He was a Distinguished Lecturer of Taiwan Electromagnetic Industry-Academia Consortium in 2017.
Dr. E-Ray Hsieh, National Chiao Tung University, Hsinchu NYCU
E-Ray Hsieh received his PhD degree of Electronics Engineering at Institute of Electronics in National Chiao-Tung University in 2016. His research has focused on the fields of semiconductor devices, circuits, and related applications, especially in more-than-Moore, embedded-memory, in-memory computing of AI, Beyond-CMOS Technology, and Quantum-computing Technology, etc. Currently, he serves as an assistant professor in Dept. of Electrical Engineering, National Central University, dedicating development of Å Technologies for the next generation, including emerging memory and quantum technology. In his pursuing academic degrees, he also had participated with the development and researches of the CMOS scaling from 65nm to 14nm under an interdisciplinary team with the cooperation of the industry (UMC and TSMC) nearly a decade. These dual roles gave him the opportunity to theoretically and technologically address and to solve deeper issues in the nano-devices. His research achievements helped him generated three APL (Applied Physics Letters) articles, one JAP article and 26 oral presentations at IEDM (International Electron Devices Meeting) and VLSI (Symposia on VLSI Technology and Circuit). One of the presentations received the candidate of the best student paper award. In 2017, his VLSI paper had been highlighted, which is ranked on the top among worldwide universities. Moreover, he was invited twice to publish the IEEE TED and J-EDS journal papers. Furthermore, he has been invited twice to publish the IEEE TED and J-EDS journal